Workshop Details

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Flux trapping remains a longstanding and unresolved challenge in the development of large-scale superconducting circuits. This workshop aims to foster in-depth discussions among researchers worldwide to explore methods for detecting and mitigating flux trapping in superconducting circuits. The workshop will be held in a hybrid format, offering both on-site and online participation options.
Dates and Time: Friday, December 13, 2024, 9:00 – 17:10 (JST)

Venue: Education and Culture Hall, Yokohama National University, Yokohama, Japan

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Online link:

https://zoom.us/j/92289651469?pwd=brdFrW0JOLMSr2BGJztiNzlGisW6j4.1

Presentations

• Wide-field quantitative imaging of superconducting vortices using diamond quantum sensors, Kento Sasaki - Department of Physics, The University of Tokyo
• Overview of large-scale AQFP efforts and FSDL plans at Yokohama National University, Christopher L. Ayala - Yokohama National University
• High-Frequency Electrodynamics of Trapped Vortices in Superconductors, Chung-Yang Wang, Jingnan Cai, Steven M. Anlage - Quantum Materials Center, Department of Physics, University of Maryland
• Experimentally detecting and mitigating trapped flux at NIST, Pete Hopkins - NIST Superconductive Electronics Group
• Superconducting digital circuits fabrication process at AIST, Fumihiro China, Shuichi Nagasawa, Mutsuo Hidaka, Fuminori Hirayama, Koh-ichi Nittoh, and Go Fujii - Global Research and Development Center for Business by Quantum-AI Technology (G-QuAT) and National Institute of Advanced Industrial Science and Technology (AIST)
• Mitigation of Flux Trapping in Large- Format, Low-Tc Analog SQUID Arrays, Kent Irwin - Yokohama National University
• Optimizing Scanning SQUID Microscopy for Efficient Data Acquisition, Kam Moler - Yokohama National University
• Research activities on superconducting digital electronics at NICT, Hirotaka Terai, Shigeyuki Miyajima, Masahiro Yabuno, and Shigehito MikiNICT - National Institute of Information and Communications Technology
• Toward Trapped Flux Insensitive SFQ Logic Circuits, Stephen Whiteley - Synopsys, Inc.

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